DNM: Copilot messing around with SNP

[smalis-msft]

Don't bother reviewing

[github-actions]

⚠️ Unsafe Code Detected

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[Copilot]

Pull request overview

This PR introduces support for the AMD SNP COHERENCY_SFW_NO CPUID bit and uses it to conditionally apply (or skip) the SNP cache coherency fixup in the OpenHCL bootshim, while also extending the CVM CPUID masking/tests to recognize the new bit.

Changes:

• Extend ExtendedSevFeaturesEbx with the coherency_sfw_no bit and allow it through SNP CPUID masking.
• Add a CVM CPUID unit test validating that coherency_sfw_no is preserved through the SNP CPUID filtering path.
• Use COHERENCY_SFW_NO in OpenHCL boot to decide whether to perform the cache-line fixup during page acceptance, and log the decision during SNP memory setup.

Reviewed changes

Copilot reviewed 5 out of 5 changed files in this pull request and generated 1 comment.

Show a summary per file

File	Description
vm/x86/x86defs/src/cpuid.rs	Adds the coherency_sfw_no bit to the ExtendedSevFeaturesEbx CPUID bitfield definition.
openhcl/virt_mshv_vtl/src/cvm_cpuid/tests/mod.rs	Adds a unit test ensuring coherency_sfw_no survives SNP CPUID leaf filtering/masking.
openhcl/virt_mshv_vtl/src/cvm_cpuid/snp.rs	Extends the SNP CPUID EBX mask to include the coherency_sfw_no bit.
openhcl/openhcl_boot/src/arch/x86_64/snp.rs	Introduces cache_fixup_required() and conditions cache fixup during page acceptance on COHERENCY_SFW_NO.
openhcl/openhcl_boot/src/arch/x86_64/memory.rs	Logs whether the SNP cache coherency fixup is required during VTL2 memory setup.

[Copilot]

Pull request overview

Copilot reviewed 5 out of 5 changed files in this pull request and generated no new comments.

Comments suppressed due to low confidence (1)

openhcl/openhcl_boot/src/arch/x86_64/snp.rs:580

• Ghcb::initialize() still transitions the GHCB page through SNP page-state changes (unaccept + PAGE_STATE_CHANGE + mapping change). Removing the cache-line fixup here means CPUs that do require the coherency workaround can hit the same stale-cache risk described in cache_lines_fixup_page, potentially leading to memory corruption during boot logging initialization. Reintroduce the fixup, gated by cache_fixup_required(), before the page is accessed under its new (shared) assignment.

        // Map the page as non-confidential by updating the PTE.
        page_table[PT_INDEX] = pte_for_pfn(page_number, false);
        flush_tlb();

        // Flipping the C-bit makes the contents of the GHCB page scrambled,
        // zero it out.
        ghcb_access::zero_page();
        ghcb_access::set_protocol_version(GhcbProtocolVersion::V2);

[github-actions]

33 Petri tests failed (4 unstable)

[github-actions]

33 Petri tests failed (6 unstable)

[Copilot]

Pull request overview

Copilot reviewed 5 out of 5 changed files in this pull request and generated no new comments.

Comments suppressed due to low confidence (1)

openhcl/openhcl_boot/src/arch/x86_64/snp.rs:597

• The GHCB shared/unshared transition here still changes page assignment state (pvalidate + RMP state change), and on CPUs where the SNP cache coherency workaround is required this needs a cache-line fixup before the page is accessed in its new state. The previous cache_lines_fixup_page call was removed, but this path doesn’t use set_page_acceptance(..., fixup_cache=...), so the workaround would never run for the GHCB page.

        // Map the page as non-confidential by updating the PTE.
        page_table[PT_INDEX] = pte_for_pfn(page_number, false);
        flush_tlb();

        // Flipping the C-bit makes the contents of the GHCB page scrambled,
        // zero it out.
        ghcb_access::zero_page();

[github-actions]

1 Petri tests failed (0 unstable)

[Copilot]

Pull request overview

Copilot reviewed 9 out of 10 changed files in this pull request and generated 1 comment.

[github-actions]

2 Petri tests failed (2 unstable)