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Jaguar3 (RTL8822CU / RTL8812CU) userspace port#102

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jaguar3-rtl8822c-wip
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Jaguar3 (RTL8822CU / RTL8812CU) userspace port#102
josephnef wants to merge 4 commits into
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jaguar3-rtl8822c-wip

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@josephnef josephnef commented Jun 24, 2026

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Adds the Realtek Jaguar3 (rtl8822c PHY generation) chip family to
devourer — RTL8822CU / RTL8812CU (0bda:c812, 0bda:c82c, …) — as a
self-contained HAL under src/jaguar3/, dispatched at the WiFiDriver
factory by USB PID.

What it does

Ports Realtek's vendor bring-up from source:

  • power-on PWR_SEQ, MAC/USB config, HalMAC firmware download/boot
  • BB/AGC/RF table apply, 3-wire RF init, beamforming init
  • the halrf calibration the TX path needs (IQK + DACK)
  • RX, and on-air TX at 20 MHz
  • the 5/10 MHz narrowband baseband re-clock (the underclock Jaguar-1
    silicon physically lacks), selected through SelectedChannel
  • a coex runtime thread porting the rtw88 watchdog's 5 GHz coex path, which
    keeps sustained continuous TX alive on UNII-1

Architecture

Introduces a chip-family-agnostic IRtlDevice interface. RtlJaguarDevice
(Jaguar1) and the new RtlJaguar3Device both implement it; the demos and
the factory treat them uniformly, downcasting only for chip-specific
research helpers. The shared substrate (RtlUsbAdapter, radiotap,
PhyTableLoader) is reused.

The library takes no behaviour from environment variables: narrowband
bandwidth and the TX-power reference go through the API
(SelectedChannel / SetTxPower). The CLI demos read env and call the API.

The 8822C phydm tables under hal/phydm/rtl8822c/ are generated from the
upstream Realtek source by tools/extract_8822c_phy_tables.py.

Validation

Validated on RTL8812CU hardware — RX and on-air TX are both SDR-confirmed,
including the narrowband re-clock. Hardware testers for RTL8822CU and the
rtl8822e parts (8812EU/8822EU, not yet wired) are welcome.

@josephnef josephnef force-pushed the jaguar3-rtl8822c-wip branch 2 times, most recently from 2403c8e to 6b4e0d5 Compare June 30, 2026 09:19
@josephnef josephnef changed the title WIP: Jaguar3 (RTL8822CU / RTL8812EU) userspace port — software datapath (needs hardware testers) Jaguar3 (RTL8822CU / RTL8812CU) userspace port Jun 30, 2026
Adds a self-contained Jaguar3 (rtl8822c PHY generation) HAL under
src/jaguar3/ for the RTL8822CU / RTL8812CU, dispatched at the factory by
USB PID. Ports Realtek's vendor bring-up from source: power-on, HalMAC
firmware download, MAC/BB/RF init, and the halrf calibration the TX path
needs (3-wire RF + DACK + beamforming init), then RX and on-air TX at
20 MHz plus the 5/10 MHz narrowband re-clock the Jaguar-1 silicon lacks.
Sustained continuous TX on UNII-1 is kept alive by a coex runtime thread
that ports the rtw88 watchdog's 5 GHz coex path.

Introduces a chip-family-agnostic IRtlDevice interface: RtlJaguarDevice
(Jaguar1) and the new RtlJaguar3Device both implement it, and the demos
and the WiFiDriver factory treat them uniformly via dynamic_cast for
chip-specific features.

The library takes no behaviour from environment variables — narrowband
bandwidth and the TX-power reference go through the API (SelectedChannel /
SetTxPower); the CLI demos read env and call the API.

Validated on RTL8812CU hardware (RX and on-air TX both SDR-confirmed).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
@josephnef josephnef force-pushed the jaguar3-rtl8822c-wip branch from 6b4e0d5 to 2c7f253 Compare June 30, 2026 10:47
@josephnef josephnef marked this pull request as ready for review June 30, 2026 10:47
josephnef and others added 3 commits June 30, 2026 14:27
Document the second-generation Jaguar3 (rtl8822c) support alongside the
Jaguar1 family: intro, hardware landscape, the out-of-scope naming traps
(8822CU/Jaguar3 in scope vs 8822BU/Jaguar2 out of scope), and the project
layout (src/jaguar3/, hal/phydm/rtl8822c/).

Add the RTL8812CU row to the on-air TX throughput table with band-grouped
numbers measured on hardware via the same SDR channel-occupancy method as
the other chips (tests/bench_onair.py, MCS7/20 MHz, saturating flood):
2.4 GHz 65, UNII-1 60, UNII-2/3 61 Mbps. A new '‡' legend marks the
UNII-2/3 ~50-60 s sustained-TX stop. RTL8812CU added to bench_onair.py so
the table stays reproducible.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
On-hardware retest (RTL8812CU, ch149, USRP B210 channel-occupancy):
sustained continuous TX holds flat at ~93% duty / ~60 Mbps for ~3 min with
zero bulk-OUT failures — the previously-documented "~50-60 s stop on
UNII-2/3" no longer reproduces. The coex runtime thread added for UNII-1
also keeps the upper band alive. Update README table (drop the '‡'
stop caveat) and CLAUDE.md to current state; DFS UNII-2 channels
(ch100/120/144) remain unvalidated and are called out as such.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
On-hardware (RTL8812CU, USRP B210 channel-occupancy) the DFS UNII-2
channels now validated alongside UNII-1/UNII-3: ch100/120/144 each held
~93% duty / ~60 Mbps (MCS7/20) flat across 20/50/80 s, ~40k submits,
zero bulk-OUT failures — no CAC/radar gating blocked TX. Drop the
"DFS not yet validated" caveat from README + CLAUDE.md.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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